UCC27714

• High-Side, Low-Side Configuration, with Independent Inputs
• Fully Operational up to 600 V (HS Pin)
• Floating Channel Designed for Bootstrap Operation
• Peak Output Current Capability of 4-A Sink 4-A Source at VDD = 15 V
• Best-In-Class Propagation Delay (125-ns Maximum)
• Best-In-Class Delay Matching (20-ns Maximum)
• TTL and CMOS Compatible Input Logic
• VDD Bias Supply Range of 10 V to 20 V
• Bias UVLO Protection for Both Channels
• Rail-to-Rail Drive
• Robust Operation Under Negative Voltage Transients
• High dv/dt Immunity (HS Pin)
• Separated Grounds for Logic (VSS) and Driver (COM) with Capability to Sustain Voltage Difference
• Optional Enable Function (Pin 4)
• Outputs Held in LOW when Inputs Floating
• Inputs and Enable Pin Voltage Levels Not Restricted by VDD Pin Bias Supply Voltage
• High and Low Voltage Pins Separated for Maximum Creepage and Clearance
• Negative Voltage Handling Capability on Input and Enable Pins

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