UCC27517

• Low-Cost Gate-Driver Device Offering Superior Replacement
  of NPN and PNP Discrete Solutions
• 4-A Peak-Source and 4-A Peak-Sink Symmetrical Drive
• Fast Propagation Delays (13-ns Typical)
• Fast Rise and Fall Times (9-ns and 7-ns Typical)
• 4.5 to 18-V Single-Supply Range
• Outputs Held Low During VDD UVLO (Ensures Glitch-Free
  Operation at Power Up and Power Down)
• TTL and CMOS Compatible Input-Logic Threshold (Independent
  of Supply Voltage)
• Hysteretic-Logic Thresholds for High-Noise Immunity
• Dual Input Design (Choice of an Inverting (IN– pin) or
  Noninverting (IN+ Pin) Driver Configuration)
  • Unused Input Pin Can Be Used for Enable or Disable Function
• Output Held Low When Input Pins Are Floating
• Input Pin Absolute Maximum Voltage Levels Not Restricted
  by VDD Pin Bias Supply Voltage
• Operating Temperature Range of –40°C to 140°C
• 5-Pin DBV (SOT-23) and 6-Pin DRS (3-mm ×
  3-mm WSON With Exposed Thermal Pad) Package Options

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